机读格式显示(MARC)

• 000 01504nam2 2200373 4500

• 000 1000007456

• 001 0000163774

• 003 CAL

• 005 20050125142010.0

• 008 981216m19861987ne a b 00100 eng

• 010 __ |a 86016729 //r88

• 020 __ |a 0444878904 (set)

• 020 __ |a 0444878939 (pt. 1)

• 020 __ |a 0444878890 (pt. 2) |c CNY8.90

• 040 __ |a XAIT |c XAIT

• 050 00 |a TK7874 |b .C546 1986

• 082 00 |a 621.381/73 |2 19

• 090 __ |a TN710.2/E1:3(2)

• 093 __ |a TN710.2 |2 4

• 099 __ |a CAL 022000317017 |a CAL 022000353361 |a CAL 021999667351

• 245 00 |a Circuit analysis, simulation, and design / |c edited by A.E. Ruehli. |n vol.3-part2

• 260 __ |a Amsterdam ; |a New York : |b North-Holland ; |a New York, N.Y., U.S.A. : |b Sole distributors for the U.S.A. and Canada, Elsevier Science Pub. Co., |c 1986-

• 300 __ |a 2 v.399p. : |b ill. ; |c 25 cm.

• 440 _0 |a Advances in CAD for VLSI ; |v v. 3

• 504 __ |a Includes bibliographies and indexes.

• 505 0_ |a pt. 1. General aspects of circuit analysis and design -- pt. 2. VLSI circuit analysis and simulation.

• 650 _0 |a Electric circuit analysis.

• 650 _0 |a Integrated circuits |x Very large scale integration |x Design and construction |x Data processing.

• 700 1_ |a Ruehli, A.E. |q (Albert E.), |d 1937-

• 905 __ |a XATU |d TN710.2/E1:3(2)

• 920 __ |a 261060 |z 1

• 950 __ |a 261060 |f TN710.2/E1:3(2)

• 991 __022005003412

• 999 __ |t C |A shenxiaoyan |a 20050125 14:17:19 |M shenxiaoyan |m 20050125 14:20:10 |G shenxiaoyan |g 20050125 14:20:2