机读格式显示(MARC)

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• 000 1000006496

• 001 0000162845

• 003 CAL

• 005 20050120144607.0

• 008 900221s1990 nyua b 100 0 eng d

• 010 __ |a 90006949

• 020 __ |a 0444886885 (U.S.) |c CNY16.70

• 020 __ |a 044488372X

• 020 __ |a 0444886893

• 040 __ |a DLC |c XAIT

• 050 00 |a TK7874 |b .I3283 1989a

• 082 00 |a 621.39/5 |2 20

• 090 __ |a TN47-53/E9:2:(89)

• 093 __ |a TN47-53 |2 4

• 099 __ |a CAL 022004116542

• 111 2_ |a IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design |d (1989 : |c Houthalen, Belgium)

• 245 10 |a Formal VLSI correctness verification : |b proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design / |c sponsored by IMEC, Houthalen, Belgium, 13-16 November, 1989 ; edited by Luc J.M. Claesen.

• 260 __ |a Amsterdam ; |a New York : |b North-Holland ; |a New York, N.Y. : |b Distributed in the U.S. and Canada, Elsevier Science Pub. Co., |c 1990.

• 300 __ |a xv, 427 p. : |b ill. ; |c 23 cm.

• 440 _0 |a VLSI design methods ; |v 2

• 504 __ |a Includes bibliographical references.

• 650 _0 |a Integrated circuits |x Verification |v Congresses.

• 650 _0 |a Integrated circuits |x Very large scale integration |x Computer-aided design |v Congresses.

• 700 1_ |a Claesen, Luc J. M.

• 710 2_ |a Interuniversity Micro-Electronics Center.

• 905 __ |a XATU |d TN47-53/E9:2:(89)

• 920 __ |a 261060 |z 1

• 950 __ |a 261060 |f TN47-53/E9:2:(89)

• 991 __022005002496

• 999 __ |t C |A zhaining |a 20050120 14:43:56 |M zhaining |m 20050120 14:46:07 |G zhaining |g 20050120 14:46:2